Neuromorphic chips: processors built around spikes

Neuromorphic chips are processors designed around a few ideas taken from the brain. Instead of running one long list of instructions, they contain many small processing units that act like neurons and send each other brief pulses called spikes. Much of the time they only do work when an incoming spike changes something, and their memory sits close to the processing. Conventional computers shuttle data back and forth between separate memory and processor, which costs time and energy. The appeal is power. If the approach works at scale, some AI and sensing tasks might run on small batteries in devices such as wearables and sensors, rather than in data centres. That is still being tested, so this article separates what has been shown from what has only been claimed.

What has been demonstrated

A chip with a million neurons. IBM's TrueNorth chip, described in a paper published in Science in August 2014, packs 4,096 neurosynaptic cores, 1 million programmable spiking neurons and 256 million synapses into 5.4 billion transistors. The paper reports that with video input at 400 by 240 pixels and 30 frames per second, the chip draws 63 milliwatts (IBM Research). Those are absolute figures for one workload. On their own they do not show how the chip compares with a conventional processor doing the same job.

Scientific computing on Loihi 2. Bradley Theilman and James Aimone map sparse finite element calculations, a standard way of solving physical equations, onto spiking neurons running on Intel's Loihi 2. Their preprint, posted to arXiv in January 2025, says the approach can reach "comparable levels of numerical accuracy and scaling" to conventional methods for the Poisson equation (arXiv). The peer-reviewed version, published in Nature Machine Intelligence on 13 November 2025, reports energy measured with Loihi 2's built-in power measurement: at most about 80 millijoules of extra energy per solution for meshes of up to about 1,000 nodes. The authors also say a conventional processor (CPU) solved the same systems faster, by about 1 to 2 times with one standard solver and about 10 to 20 times with another. They estimate, rather than measure side by side, that each solution costs much less energy on Loihi 2 (Nature Machine Intelligence).

On-chip training prototypes. A preprint posted to arXiv in November 2024 describes a multi-core architecture for training deep spiking neural networks directly (arXiv). The peer-reviewed version, published in Nature Communications on 25 March 2026, reports that the design was run on FPGAs, which are reprogrammable chips used for prototyping, for a 20-core deep spiking network training run and a five-worker federated learning run (Nature Communications). Its efficiency figures are covered below, because they are estimates rather than measurements on a finished chip.

What is only reported

The figures in this section come from the developers, or are estimates from design simulations. None has been independently reproduced in the sources reviewed.

IBM's NorthPole. NorthPole is a brain-inspired inference chip built on a 12 nm process with 22 billion transistors; IBM's article does not describe it as using spikes. On ResNet-50 image classification, IBM reports it processed 25 times more frames per joule than common 12 nm GPUs and 14 nm CPUs, and that it had lower latency (IBM Research). The article gives no absolute latency or power figures and names the baseline chips only by process node. It says the results were published in Science; we have not checked that paper, so this is treated as a company claim.

Intel's Hala Point. Intel announced Hala Point in April 2024. It packages 1,152 Loihi 2 research processors with up to 1.15 billion neurons and 128 billion synapses, and draws a maximum of 2,600 watts. Intel says Sandia National Laboratories plans to use it for brain-scale computing research. Intel reports efficiency "exceeding 15 trillion 8-bit operations per second per watt" when running conventional deep neural networks. A footnote gives the test conditions: a multi-layer network fed with random noise, pruned to 10:1 sparsity, with neuron models at 10 per cent activation. Intel says this "rivals and exceeds" GPU and CPU designs but names no specific system to compare against. It also gives a figure of up to 20 petaops, without stated conditions (Intel). These are company figures, not independent measurements on a named real-world workload.

Training chip efficiency estimates. The on-chip training work reports 1.05 TFLOPS/W at FP16 for a 28 nm design, and a 55 to 85 per cent reduction in memory access compared with an A100 GPU during spiking network training (arXiv). The journal version states that area and power were estimated from simulations of the design for a 28 nm process, not measured on a fabricated chip, and the authors say the design still needs assessment on fabricated chips (Nature Communications).

BrainChip's Akida chips. BrainChip announced on 30 June 2026 the commercial availability and initial production shipments of its Akida AKD1500 processors, made on a GlobalFoundries 22 nm process. The company says customers have begun receiving production-volume quantities for defence and wearable uses, while the chip goes through qualification testing, and that it draws under 300 milliwatts in one interface mode and under 200 milliwatts in another (BrainChip). The release gives no unit numbers, customer names or revenue, and its power figures have not been independently tested in the sources reviewed.

What remains speculative

Several uses are plausible but not yet shown in any source reviewed here: always-on sensing in hearing aids, wearables or drones that runs for long periods on a small battery; robots that learn on the device without sending data to the cloud; energy-efficient solvers for large physics simulations; and processing spike-like signals from electronic skin or neural implants.

Limits and open problems

• Software. The sources reviewed do not describe a widely used toolchain for these chips, so we cannot say how easily developers can use them.
• Training. On-chip training has been shown on FPGA prototypes. The sources reviewed do not report measured power from fabricated silicon, and do not show that spiking networks can match conventional deep learning accuracy across many tasks.
• Narrow tests. Headline numbers depend on chosen benchmarks, precisions, inputs and sparsity levels, as the Hala Point footnote shows. None of the sources reviewed compares a neuromorphic system with a GPU on the same production workload, with energy measured across the whole system.
• Speed versus energy. In the finite element work, a conventional processor was faster, and the energy advantage on Loihi 2 was estimated rather than measured side by side.
• Comparison choices. Baselines vary: a process node, a named GPU, or no system at all. The chips also differ in architecture, so a result on one platform does not transfer neatly to another.
• Adoption. The sources show research systems and early commercial shipments, not mainstream use.

What to watch next

• Measured power from fabricated silicon for on-chip training designs, rather than estimates.
• Independent benchmarks comparing neuromorphic and GPU systems on the same workload, with energy measured for the whole system.
• BrainChip reporting AKD1500 unit volumes, repeat orders or named products that have passed qualification.
• Published results from Hala Point or similar systems on problems conventional computers already solve, with energy reported.